Data Acquisition with Zynq + FreeRTOS+TCP/IP Stack
Post date: Sep 27, 2015 7:47:59 PM
Video demonstrating the project.
Project. The project is simply an audio system that records for approximately eight seconds and then transmits the audio data from the hardware to another computer. Once again, the PmodMIC and PmodAMP3 peripherals are used, however, in lieu of the Atlys board, the Avnet ZedBoard is the platform over which the project is developed. The audio data is transmitted over the ZedBoard’s Gigabit Ethernet port through a server running over one of the Zynq’s ARM cores, implemented with the FreeRTOS+TCP/IP stack. In an attempt to be more concise, this latest project will be divided into two different posts.
The first post—this post—focuses primarily on the programmable logic aspect, especially paying close attention to ARM AXI communication protocols. The next post will cover the software aspect of the project.
Random picture of the Avnet ZedBoard with some of the pertinent peripherals plugged in.
I was going to use the ZC702 Evaluation Board for this project, however I found out the general purpose Pmod connectors on the ZC702 operate at 2.5V. After some digging in the user manual and forums, I learned there is a way to program the Pmod pins to operate at the PmodAMP3’s necessary voltage of 3.3V. The problem is, in order to program the ZC702’s VADJ, I would have to either implement Texas Instrument’s PMBus protocol, or purchase a special USB interface adapter. I wanted to focus primarily on the AXI Lite and Stream protocols for this project, so I decided to just use the ZedBoard, for which I know both the PmodMIC and PmodAMP3 peripherals work.
The same modules from my last post are applied to read from the microphone and write to the audio amplifier, however AXI Stream interfaces are implemented for both modules in order to connect said modules to other modules. To be honest, there really wasn’t much of a need to create so many different modules, since everything besides the processing system, system reset, and AXI Interconnect IP could have been more easily shoved into a single module, with a single AXI Lite interface for the processing system.
Programmable Logic. The PmodMIC module captures audio from the microphone. The PmodMICController module ensures samples are taken from the PmodMIC at a rate of approximately 48 KHz. The MBDataAcquisitionController bridges both the PmodMICController and PmodAMP3Controller modules, but more importantly allows the processing system to acquire the audio data. The PmodAMP3Controller shifts the audio data into a format acceptable to the PmodAMP3. Finally, the PmodAMP3 outputs the audio data to the audio amplifier at the same rate of approximately 48 KHz.
Please know that the buttons for zooming in and opening the PDF in its own window is located in the upper-right corner when scrolled to the top of the PDF! I apologize for the inconvenience.
It’s worth pointing out the MB in MBDataAcquisitionController refers to MicroBlaze. The original plan was to have the MicroBlaze run FreeRTOS with the lwIP stack in order to transfer data through the Gigabit Ethernet port. To my dismay, however, there didn’t seem to be a simple way to convert the Giga Media Independent interface (GMII) down to a MII, which is the interface of the Xilinx AXI Ethernet Lite IP. The software example for lwIP relied on AXI Ethernet Lite.
AXI. The ARM Advanced eXtensible Interface (AXI) defines a series of master-slave interfaces for processor intercommunication. Each interface within AXI is typically comprised of one or five channels, for which each channel consists of handshaking and data signals. The nitty gritty details of AXI can be downloaded from ARM’s website. Only two the Stream and Lite interfaces are implemented for this particular project.
The Stream interface is by far the most simplex. Haha! Forgive me, but that last sentence was supposed to be a pun, considering AXI Stream’s single channel only permits the flow data from master to slave interfaces, and it’s also very simple. The code snippet below demonstrates how the slave Stream interface of the PmodAMP3Controller is implemented.
This snippet demonstrates how the slave Stream interface synchronizes with the master Stream interface (not shown), using basic handshaking.
The slave Lite interface of the MBDataAcquisitionController is relatively more complex (hahaha… I’m done), with its five channels. A master interface can write and read from a slave interface, however. Below is a code snippet demonstrating how the reading portion of the slave Lite interface is carried out.
The Lite interfaces consist of five channels, two of which are intended for reading data from a slave interface to a master interface. The signals beginning with "S_AXI_AR..." are associated with the address read channel, whereas the signals beginning with "S_AXI_R..." are associated with the data read channel. Control information is first sampled from the address read channel, and then the data is finally transferred over the data read channel. All synchronization is done with simple handshaking.
A writing portion is implemented, however it’s not important; all writes to the MBDataAcquisitionController are basically ignored, considering the slave Lite interface is only intended for reading audio data.
Next Post and Project. Earlier I mentioned the next post will focus on the software. But, I’ve already started to think about the next project, which should involve Linux.
Code. I updated the repository for the PmodMIC-PmodAMP3-VHDL modules with the modules having to do with AXI. Unfortunately, I couldn't immediately figure out an organized and complete way to include the Vivado RTL project. Sure, I could simply try to package the entire project directory, but some of the modules packaged as IP are located outside of the project folder, and the same problem applies to the sources related to the software application except worse. Another layer of complication is I am planning to rely more and more on GitHub to make my code publicly available; in other words, I will want to only share the code, not the other files related to Vivado projects.
For this project, contact me directly for the project itself as only a reference project. I included the description for the MBDataAcquisitionController below.